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ECSE 530 Logic Synthesis (3 credits)

Note: This is the 2014–2015 edition of the eCalendar. Update the year in your browser's URL bar for the most recent version of this page, or click here to jump to the newest eCalendar.

Offered by: Electrical & Computer Engr (Faculty of Engineering)

Overview

Electrical Engineering : The place of logic synthesis in microelectronics. Representations of Boolean functions: logic covers, binary decision diagrams. Two-level synthesis algorithms, Espresso. Multi-level synthesis to Boolean networks: don't care methods, algebraic optimizations, delay modelling. Sequential synthesis: state-based optimizations, state assignment, network optimizations. Technology mapping: library cell and FPGA mapping.

Terms: This course is not scheduled for the 2014-2015 academic year.

Instructors: There are no professors associated with this course for the 2014-2015 academic year.

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